MCQ 1 In the indirect address mode,

(A) effective address is equal to address part of instruction (B) content of program counter is added to address part of instruction (C) a memory is addressed by a register (D) address in the instruction points to location of effective address

MCQ 2 The DMA controller has _______ registers.

(A) 4 (B) 2 (C) 3 (D) 1

MCQ 3 Which architecture involves both the volatile and the non volatile memory?

(A) Harvard architecture (B) Von Neumann architecture (C) None of the mentioned (D) All of the mentioned

MCQ 4 Integrated Circuits (Ics) are related to which generation of computers?

(A) First generation (B) Second generation (C) Third generation (D) Fourth generation

MCQ 5 The main electronic component used in first generation computers was

(A) Transistors (B) Vacuum Tubes and Valves (C) Integrated Circuits (D) None of above

MCQ 6 A storage area used to store data to a compensate for the difference in speed at which the different units can handle data is

(A) Memory (B) Buffer (C) Accumulator (D) Address

MCQ 7 Which of the following storage devices can store maximum amount of data?

(A) Floppy Disk (B) Hard Disk (C) Compact Disk (D) Magneto Optic Disk

MCQ 8 When was vacuum tube invented?

(A) 1900 (B) 1906 (C) 1910 (D) 1880

MCQ 9 In which of the following addressing mode, the offset is obtained by adding displacement and contents of one of the base registers?

(A) direct mode (B) register mode (C) based mode (D) indexed mode

MCQ 10 Fetch operation are not required in

(A) direct addressing (B) indirect addressing (C) immediate addressing (D) register addressing

MCQ 11 In register addressing mode operands are looked in

(A) cache (B) secondary storage (C) CPU (D) primary memory

MCQ 12 Memory management on a multiprocessor must deal with all of found on

(A) Uniprocessor Computer (B) Computer (C) Processor (D) System

MCQ 13 In a multi-processor configuration two coprocessors are connected to host 8086 processor. The instruction sets of the two coprocessors

(A) must be same (B) may overlap (C) must be disjoint (D) must be the same as that of host

MCQ 14 The main objective in building the multimicroprocessor is

(A) greater throughput (B) enhanced fault tolerance (C) greater throughput and enhanced fault tolerance (D) none of the mentioned

MCQ 15 Microprocessors which are directly connected memory to a single-chip, that is sometimes called as

(A) Backside (B) Memory bus (C) Kernel (D) Both A and B

MCQ 16 Symmetric multiprocessors architectures, are sometimes known as

(A) Uniform memory access (B) Static memory access (C) Variable memory access (D) All of the above

MCQ 17 An interface between the user or an application program, and the system resources is

(A) microprocessor (B) microcontroller (C) multimicroprocessor (D) operating system

MCQ 18 Cycle stealing is/are used in which concept?

(A) Programmed I/O (B) DMA (C) Interrupts (D) Memory mapped I/O

MCQ 19 What are the building blocks of combinational circuits?

(A) Flip-flops (B) Logic gates (C) Latches (D) Registers

MCQ 20 What is the purpose of Stack Pointer (SP) register?

(A) It is used for accessing strings (B) It is used for accessing memory (C) It is used for accessing stack (D) It is used for accessing data segment

MCQ 21 Consider DR ← M [AR], Identify the operation.

(A) Arithmetic Operation (B) Shift Operation (C) Memory Write (D) Memory Read

MCQ 22 What is the operation sets to 1 the bits in one register where there are corresponding 1’s in the second register?

(A) Selective Complement (B) Selective Clear (C) Selective Set (D) Mask

MCQ 23 ______ interface is used to connect the processor to I/O devices that require transmission of data one bit at a time.

(A) Parallel (B) Serial (C) Output (D) Input

MCQ 24 The DMA transfer technique where transfer of one word data at a time is called

(A) Cycle stealing (B) Memory stealing (C) Hand-shaking (D) Inter-leaving

MCQ 25 Private data that is used by a single-processor, then shared data are used by

(A) Single processor (B) Multi processor (C) Single tasking (D) Multi tasking